|Other titles||1999 International Symposium on Power Semiconductor Devices and ICs|
|Statement||sponsor, IEEE Electron Devices Society ; co-sponsor, the Institute of Electrical Engineers of Japan.|
|Contributions||Denki Gakkai (1888), IEEE Electron Devices Society., Institute of Electrical and Electronics Engineers.|
|LC Classifications||TK7881.15 .I42 1999|
|The Physical Object|
|Pagination||xxiii, 359 p. :|
|Number of Pages||359|
|ISBN 10||0780352904, 0780352912, 0780352920|
ISPSD (International Symposium on Power Semiconductor Devices and ICs) is an annual conference established in by the Institute of Electrical and Electronics Engineers (IEEE) on a wide range of power technologies. Host to over experts from across the world, ISPSD is the premier forum for technical discussions in all areas of power semiconductor devices and power integrated circuits. Welcome to ISPSD website. The 31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD) will take place in Shanghai, May , ISPSD is the premier forum for technical discussions in all areas of power semiconductor devices, power integrated circuits, their hybrid technologies and applications. A new isolated current measurement principle named HOKA is presented. A current probe based on this principle has been realized. It was designed for a currCited by: ISPSD Author Information Important Deadlines: Decision notification: (GMT ) Final submission & Copyright deadline: Mar 6, (GMT.
Shenoy P M, Bhalla A and Dolny G Analysis of the effect of charge imbalance on the static and dynamic characteristics of the super junction MOSFET IEEE International Symposium on Power Semiconductor Devices & IC's (ISPSD) Google Scholar. Chung Y et al. Energy capability of power devices with Cu layer integration, ISPSD ' p. 63–6; Transient thermal simulation of power devices with Cu layer. ISPSD ' p. . References:  V. Mehrotra: "Wirebond Reliability in IGBT-Power Modules: Application of High Resolution Strain and Temperature Mapping", Proc. ISPSD'99, pp. ,  H. Berg, E. Wolfgang: "Advanced IGBT modules for railway traction applications: Reliability testing", Microelectr. Abstract: We developed a 3rd generation trench gate MOSFET driven by a gate voltage of V. The on-resistance (R/sub on/) of the 3rd generation device has been reduced by 40% compared with the conventional (2nd generation) device, to the value of 12 m/spl Omega/ maximum (at V/sub GS/= V) by using certain techniques.
Time: Lecture Room: Monday May 20th, A1L-A PLENARY 1 (2 papers) Chr: Kuang Sheng, Oliver Häberlen Track: 7: Monday May 20th, A2L-A PLENARY 2 (2 papers) Chr: Kevin Chen, Nando Kaminski. A novel process technique for fabricating trench gate DMOSFETs using the two-step trench technique and trench contact structure is realised to obtain higher cell density and lower on-resistance. Using this process technique, a remarkably increased trench gate DMOSFET with a cell pitch of µm and a channel density of Mcell/in2 are obtained. Since last 10 years we help you get access to amazing free photoshop resources, tutorials and templates blog. Ueno Katsunori et al., Al/Ti Schottky barrier diodes with the guard-ring termination for 6H-SiC, ISPSD'95 pp. –, DOI: /ISPSD Google Scholar; R. Raghunathan and B. J. Baliga, EBIC investigation of edge termination techniques for silicon carbide power devices, ISPSD () pp. –, DOI: /ISPSD